MSc B. Gönen

PhD student
Electronic Instrumentation (EI), Department of Microelectronics

PhD thesis (Jul 2021): The Zoom ADC: An Energy Efficient ADC for High Resolution
Promotor: Kofi Makinwa, Fabio Sebastiano

Expertise: Very low power audio ADCs

Themes: Precision Analog

Publications

  1. A 590 µW, 106.6 dB SNDR, 24 kHz BW Continuous-Time Zoom ADC with a Noise-Shaping 4-bit SAR ADC
    Mehrotra, Shubham; Eland, Efraïm; Karmakar, Shoubhik; Liu, Angqi; Gönen, Burak; Bolatkale, Muhammed; Van Veldhoven, Robert; Makinwa, Kofi A.A.;
    In ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC),
    pp. 253-256, 2022. DOI: 10.1109/ESSCIRC55480.2022.9911295

  2. A 440-μW, 109.8-dB DR, 106.5-dB SNDR Discrete-Time Zoom ADC With a 20-kHz BW
    E. Eland; S. Karmakar; B. Gönen; R. van Veldhoven; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 56, pp. 1207-1215, January 2021. DOI: 10.1109/JSSC.2020.3044896
    Abstract: ... This article describes a discrete-time zoom analog-to-digital converter (ADC) intended for audio applications. It uses a coarse 5-bit SAR ADC in tandem with a fine third-order delta–sigma modulator ( ΔΣM ) to efficiently obtain a high dynamic range. To minimize its over-sampling ratio (OSR) and, thus, its digital power consumption, the modulator employs a 2-bit quantizer and a loop filter notch. In addition, an extra feed-forward path minimizes the leakage of the SAR ADC’s quantization noise into the audio band. The prototype ADC occupies 0.27 mm 2 in a 0.16- μm technology. It achieves 109.8-dB DR, 106.5-dB SNDR, and 107.5-dB SNR in a 20-kHz bandwidth while dissipating 440 μW . It also achieves state-of-the-art energy efficiency, as demonstrated by a Schreier FoM of 186.4 dB and an SNDR FoM of 183.6 dB.

  3. A 440-μW, 109.8-dB DR, 106.5-dB SNDR Discrete-Time Zoom ADC With a 20-kHz BW
    E. Eland; S. Karmakar; B. Gönen; R. van Veldhoven; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 56, Issue 4, pp. 1207-1215, January 2021. DOI: 10.1109/JSSC.2020.3044896
    Abstract: ... This article describes a discrete-time zoom analog-to-digital converter (ADC) intended for audio applications. It uses a coarse 5-bit SAR ADC in tandem with a fine third-order delta–sigma modulator ( ΔΣM ) to efficiently obtain a high dynamic range. To minimize its over-sampling ratio (OSR) and, thus, its digital power consumption, the modulator employs a 2-bit quantizer and a loop filter notch. In addition, an extra feed-forward path minimizes the leakage of the SAR ADC’s quantization noise into the audio band. The prototype ADC occupies 0.27 mm 2 in a 0.16- μm technology. It achieves 109.8-dB DR, 106.5-dB SNDR, and 107.5-dB SNR in a 20-kHz bandwidth while dissipating 440 μW . It also achieves state-of-the-art energy efficiency, as demonstrated by a Schreier FoM of 186.4 dB and an SNDR FoM of 183.6 dB.

  4. A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW
    E. Eland; S. Karmakar; B. Gönen; R. van Veldhoven; K. Makinwa;
    In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
    June 2020. DOI: 10.1109/VLSICircuits18222.2020.9162856.

  5. A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BW
    Eland, Efraïm; Karmakar, Shoubhik; Gönen, Burak; van Veldhoven, Robert; Makinwa, Kofi;
    In 2020 IEEE Symposium on VLSI Circuits,
    pp. 1-2, 2020. DOI: 10.1109/VLSICircuits18222.2020.9162856

  6. A Low Power Continuous-Time Zoom ADC for Audio Applications
    B. Gönen; S. Karmakar; R. van Veldhoven; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 55, pp. 1023-1031, 12 2019. DOI: 10.1109/JSSC.2019.2959480
    Abstract: ... This article presents a continuous-time zoom analog to digital converter (ADC) for audio applications. It employs a high-speed asynchronous SAR ADC that dynamically updates the references of a continuous-time delta-sigma modulator (CTDSM). Compared to previous switched-capacitor (SC) zoom ADCs, its input impedance is essentially resistive, which relaxes the power dissipation of its reference and input buffers. Fabricated in a 160-nm CMOS process, the ADC occupies 0.27 mm 2 and achieves 108.1-dB peak SNR, 106.4-dB peak signal to noise and distortion ratio (SNDR), and 108.5-dB dynamic range in a 20-kHz bandwidth while consuming 618 μW. This results in a Schreier figure of merit (FoM) of 183.6 dB.

  7. A Low Power Continuous-Time Zoom ADC for Audio Applications
    B. Gönen; S. Karmakar; R. van Veldhoven; K. A. A. Makinwa;
    IEEE Journal of Solid-State Circuits,
    Volume 55, Issue 4, pp. 1023-1031, 12 2019. DOI: 10.1109/JSSC.2019.2959480
    Abstract: ... This article presents a continuous-time zoom analog to digital converter (ADC) for audio applications. It employs a high-speed asynchronous SAR ADC that dynamically updates the references of a continuous-time delta-sigma modulator (CTDSM). Compared to previous switched-capacitor (SC) zoom ADCs, its input impedance is essentially resistive, which relaxes the power dissipation of its reference and input buffers. Fabricated in a 160-nm CMOS process, the ADC occupies 0.27 mm 2 and achieves 108.1-dB peak SNR, 106.4-dB peak signal to noise and distortion ratio (SNDR), and 108.5-dB dynamic range in a 20-kHz bandwidth while consuming 618 μW. This results in a Schreier figure of merit (FoM) of 183.6 dB.

  8. A Low Power Continuous-Time Zoom ADC for Audio Applications
    B. Gönen; S. Karmakar; R. van Veldhoven; K. A. A. Makinwa;
    In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
    6 2019. DOI: 10.23919/VLSIC.2019.8778021

  9. A Low Power Continuous-Time Zoom ADC for Audio Applications
    B. Gönen; S. Karmakar; R. van Veldhoven; K. A. A. Makinwa;
    In Dig. Techn. Paper IEEE Symposium on VLSI Circuits (VLSI),
    pp. C224-C225, 6 2019. DOI: 10.23919/VLSIC.2019.8778021

  10. A Hybrid ADC for High Resolution: The Zoom ADC
    B. Gönen; F. Sebastiano; R. van Veldhoven; K.A.A. Makinwa;
    Springer, , 2017.

  11. A Hybrid ADC for High Resolution: The Zoom ADC
    B. Gönen; F. Sebastiano; R. van Veldhoven; K.A.A. Makinwa;
    In Proc. Advances in Analog Circuit Design Workshop (AACD),
    April 2017. DOI: 10.1007/978-3-319-61285-0_6

  12. A Hybrid ADC for High Resolution: The Zoom ADC
    B. Gönen; F. Sebastiano; R. van Veldhoven; K.A.A. Makinwa;
    In Harpe, Pieter; Makinwa, Kofi A. A.; Baschirotto, Andrea (Ed.), Proc. Advances in Analog Circuit Design Workshop (AACD),
    Cham, Springer International Publishing, pp. 99--117, April 2017. DOI: 10.1007/978-3-319-61285-0_6
    Abstract: ... This paper presents a dynamic zoom ADC for audio applications. It achieves 109-dB DR, 106-dB SNR, and 103-dB SNDR in a 20-kHz bandwidth, while dissipating 1.12 mW and occupying only 0.16 mm2 in 0.16-$\mu$m CMOS. This translates to state-of-the-art energy and area efficiency. In this paper, the system- and circuit-level design of the ADC will be presented.

  13. A 1.65mW 0.16mm² Dynamic Zoom-ADC with 107.5dB DR in 20kHz BW
    B. Gönen; F. Sebastiano; van R. Veldhoven; K.A.A. Makinwa;
    In 2016 IEEE International Solid-State Circuits Conference (ISSCC),
    IEEE, pp. 282-283, Feb 2016. DOI: 10.1109/isscc.2016.7418017

  14. Efficient Analog to Digital Converter
    B. Gönen; F. Sebastiano; K.A.A. Makinwa; R.H.M. van Veldhoven;
    Patent, 9,325,340, April 26 2016.

BibTeX support

Last updated: 4 Jan 2022

Burak Gönen

Alumnus
  • Left in 2021