[2026] A Hardware-Efficient Spike Encoder for Neuromorphic Processing on Speech Implants [open]

Neural implants for speech decoding have the potential to restore communication for patients with severe motor impairments. However, current state-of-the-art solutions are based on tethered setups, where patients must be physically connected to external PCs that run power-hungry Deep Learning models. To move toward a fully implantable, wireless solution, we must shift the decoding operations from external hardware to the chip itself.

While a primary bottleneck in neural implants is feature extraction, our custom data compression technique lowers dynamic power of this block. However, standard deep learning decoders remain too computationally heavy for on-chip use. To achieve a standalone, low-power implant, we aim to replace these heavy models with neuromorphic decoders. This requires an efficient transition from compressed neural signals to discrete spike trains. The goal of this project is to evolve the existing compression block into a dual-purpose Spike Encoder: a unit that discards irrelevant noise to save power and  encodes the preserved data into a format that a neuromorphic model can process directly.

Assignment

The student will be tasked with:

1. Algorithm Investigation: Exploring different encoding strategies (e.g., rate coding, temporal coding, or delta modulation) to determine which most effectively preserves the speech features within the compressed data.
2. Model Integration: Developing a pipeline that can generate spike trains from the compressed data, which can then be used by a neuromorphic model for speech decoding.
3. Hardware-Aware Design: Optimizing the encoder for on-chip implementation. The student will evaluate the trade-offs between encoding accuracy, power consumption, and silicon area.
4. Validation: Testing the encoder's performance using existing neural datasets to ensure that the decoded speech quality is maintained despite the transition to a neuromorphic framework.

Requirements

MSc student in Microelectronics, Computer Engineering, or Biomedical Engineering with a strong interest in the intersection of neuroscience and hardware design. The ideal candidate should have:

• Solid understanding of Deep Learning algorithms and signal processing.
• Experience or strong interest in Digital IC Design (RTL, Verilog/VHDL).
• Proficiency in Python (PyTorch/TensorFlow).
• Familiarity with neuromorphic principles or Spike Neural Networks (SNNs) is a plus.

Contact

Last modified: 2026-03-18